Technical Field
The present invention relates to semiconductor processing, and more particularly to devices and methods for fabricating complementary metal oxide semiconductor (CMOS) devices having compressive and tensile stressed channel materials.
Description of the Related Art
Strain engineering is highly desired for boosting CMOS performance. Tensile strain is beneficial for N-type field effect transistors (NFETs), and compressive strain is beneficial for P-type field effect transistors (PFETs). Conventional external strain techniques such as, embedded source/drain, stress liner, etc. begin to lose their effectiveness due to highly scaled pitches and the three-dimensional (3D) nature of fin field effect transistors (finFETs).
Channel strain is one option that still works regardless of pitches and device architectures. However, forming a dually strained channel (tensile for NFET and compressive for PFET) is challenging.